The present invention relates to a thin-film-transistor-array substrate, specifically to a more reliable thin-film-transistor-array substrate by preventing a short circuit between wirings or interconnects from pads to array lines extended from a thin-film-transistor, a high productivity fabrication method of the thin-film-transistor-array substrate, and a display device using the thin-film-transistor-array substrate.
A display device such as a liquid-crystal display device or an electroluminescence display device using an inorganic or organic active material is recently widely used in view of reduction in size and weight. To drive the display device of these types, a thin-film-transistor-array substrate (hereafter referred to as TFT array substrate) is mostly used which is formed by arranging a plurality of thin-film transistors (TFTs) on an insulating substrate made of glass.
Particularly, to meet the requirement for high resolution while achieving reduction in size and weight, it is recently studied to use a structure in which an interlayer insulating film made of a polymer insulating film containing an insulating organic polymer is formed on the entire surface of a substrate including TFTs (hereafter referred to as a PFA structure), for the above TFT array substrate. The PFA structure is particularly marked in liquid-crystal displays for which characteristics such as reduction in size and improvement in brightness are required because it is possible to increase the effective area of the pixel electrode. In the case of the TFT array substrate including the PFA structure, a contact hole is formed in an interlayer insulating film to connect a lower wiring with a pixel electrode formed on the interlayer insulating film.
In the case of conventional formation of a contact hole in a TFT array substrate including the above PFA structure, independent photolithography processes are carried out to form a contact hole formed in the interlayer insulating film and to form a through-hole reached to the underlying TFT structure through the interlayer insulating film. Therefore, a TFT array substrate including the PFA structure has an advantage that the effective area of a pixel electrode is increased while it has a disadvantage that the fabrication cost is increased.
To overcome the above disadvantage, it is studied to form an interlayer insulating film by a photosensitive resin or a photosensitive polymer composition and reduce the photolithography processes using photomasks to one step. FIGS. 12(a) to 12(c) show a part of a conventional fabrication process for a thin-film-transistor-array substrate including a PFA structure.
As shown in FIG. 12(a), in a conventional TFT array substrate fabrication process using a photosensitive resin or a photosensitive polymer composition, an interlayer insulating film 88 is formed by applying an insulating organic polymer such as a photosensitive resin or a photosensitive polymer composition on the TFT structure including a gate wiring 82, a gate-insulating film 84, and a passivation film 86 on an insulating substrate 80. The interlayer insulating film 88 is patterned by photolithography. The edge of the interlayer insulating film 88 and a contact hole are formed in the interlayer insulating film 88 in accordance with the above patterning process. The conventional example shown in FIG. 12(a) shows a part of the substrate including the edge of the interlayer insulating film 88 as a cross section.
Then as shown in FIG. 12(b), in the conventional fabrication method, a transparent conductive film 90 for forming a pixel electrode is deposited on the structure including the interlayer insulating film 88 by chemical vapor deposition (CVD), sputtering, or vacuum evaporation. Then, to form a structure such as a pixel electrode by patterning the deposited transparent conductive film 90, a photoresist 92 is applied onto a TFT array substrate and exposed to the radiation and developed, then the transparent conductive film 90 is etched through a proper dry etching process or wet etching process. After the transparent conductive film 90 is etched, various conductive structures including the pixel electrode 94 shown in FIG. 12(c) are formed.
In the case of the PFA structure, it is necessary to increase the thickness of the interlayer insulating film 88 in order to decrease the parasitic capacity between the lower wiring layer of the interlayer insulating film 88 and the pixel electrode 94 and to completely flatten the step due to a pattern formed on the lower layer. Therefore, to fabricate the PFA structure at only one step of photolithography process, the photoresist used to etch the transparent conductive film 90 is applied so as to be thin on the interlayer insulating film 88 and so as to be thick at the portion where the edge of the interlayer insulating film 88 is formed.
If the photoresist in such condition is exposed to a radiation, the transmissive radiation dosage is low at the lower portion of the edge of the interlayer insulating film where the film thickness of the photoresist is large and then, a sufficient development contrast is not obtained. Therefore, the photoresist 92 remains around the lower portion of the edge of the interlayer insulating film 88. A part of the transparent conductive film under the remaining photoresist is not removed by the etching. Therefore, the transparent conductive film forms a conductive structure extending along the edge of the interlayer insulating film and it causes a short circuit.
FIG. 13 is a schematic perspective view showing the transparent conductive film 90 remaining due to the above imperfect etching at the lower portion of the edge of the interlayer insulating film 88. As shown in FIG. 13, if the photoresist having large difference of the thickness as mentioned above is developed under the identical condition, the photoresist is not completely removed and then a part of the transparent conductive film 90 remains at the lower portion of the edge. As a result, wiring patterns 82 formed from a gate wiring and the like to be connected to a TFT are short-circuited. This short circuit also occurs on a wiring pattern 96 formed from a source wiring or a signal wiring. It may cause the product yield to decrease and the cost to rise.
For the purpose of explanation, FIG. 13 shows schematically the wiring patterns 82 and 96 connected to a gate wiring and a signal wiring, respectively, being adjacently. Moreover, the edge of the interlayer insulating film may occur not only at the edge of a substrate on which a wiring or an interconnect pattern is formed but also when forming a contact hole in an area in which a thin-film transistor is formed.
To overcome the above disadvantages, various studies have been performed so far. For example, in the case of the official gazette of Published Unexamined Patent Application No. 10-20339, an insulating film for preventing a short-circuit is formed between an interlayer insulating film and a conductive film for preventing a disconnecting, and it is exposed from the edge of the interlayer insulating film. In the case of the method disclosed in this application, the edge of the insulating film for preventing the short-circuit is dropped into aligning with the edge of the interlayer insulating film in the process for etching the underlying layer by only one step of photolithography with using the interlayer insulating film as a resist. Therefore, the method disclosed in this application has a disadvantage that it is impossible to form a insulating film for preventing the short-circuit while exposing the film from the interlayer insulating film. Therefore, it is impossible to properly use the method disclosed in this application for a process in which a contact hole is formed by only one step of photolithography to improve the self-alignment of the contact hole.
Moreover, the official gazette of Published Unexamined Patent Application No. 10-170951 discloses a method of forming a conductive wiring as a two-layer structure of an anode oxide film and a film deposited by CVD and using an anode oxide film formed on surface as an insulating film for preventing a short-circuit. However, the method disclosed in this application has disadvantages that not only the photolithography process but also the anode oxidation process are necessary and processes are extremely complicated. Moreover, though a method of removing the remaining photoresist and a transparent conductive film with using laser abrasion or the like are proposed, the method requires a high cost and the productivity by the method cannot be satisfied.
As described above, a thin-film-transistor (TFT) array substrate in which an interlayer insulating film can be formed by only one photolithography step and which can be fabricated with high productivity and yield without causing a short circuit between wirings, a fabrication method of the TFT array substrate, and a display device using the TFT array substrate have been required so far.
Moreover, a thin-film-transistor array substrate making it possible to pattern an interlayer insulating film and at the same time, prevent wirings from being short-circuited without causing a short-circuit between conductive wirings exposed from the interlayer insulating film such as interconnects through simple process steps, a fabrication method of the TFT array substrate, and a display device including the TFT array substrate have been required.
The present invention is made to solve the above problems. The present invention forms an etching stopper at the edge of an interlayer insulating film corresponding to the portion of a conductive wiring exposed from the interlayer insulating film such as an interconnect. When the etching stopper is once formed, it is possible to form the edge of an interlayer insulating film and simultaneously securely insulate the conductive wiring by the insulating structure formed of the insulating film at the lower portion of the etching stopper by only one step of photolithography for forming the edge of the interlayer insulating film. Therefore, it is possible to perform various processes and steps to be subsequently applied without considering a short circuit between conductive wirings exposed from the interlayer insulating film in succeeding processes and steps for depositing a transparent conductive film.
That is, according to the present invention, it is possible to provide a thin-film-transistor-array substrate, comprising:
an insulating substrate;
a thin-film transistor formed on the insulating substrate in a matrix;
a conductive wiring formed on the insulating substrate and electrically connected to said thin-film transistor;
an insulating film formed adjacently to said conductive wiring;
a polymer insulating film containing an organic polymer formed on the insulating film and having an edge portion; and
an etching stopper formed on the insulating layer and protruded from the edge of the polymer insulating film.
In the thin-film-transistor-array substrate of the present invention, the above polymer insulating film may contain a photosensitive resin or a photosensitive polymer composition selected out of acrylic resin, polyimide resin, and polybenzocyclobutene. Moreover, the insulating film may include a first insulating film and a second insulating film and the etching stopper is formed on the first insulating film.
In the thin-film-transistor-array substrate of the present invention, the insulating film may include a first insulating film and a second insulating film and the above etching stopper is formed on the above second insulating film. In the present invention, the conductive wiring may include a first conductive wiring and a second conductive wiring, the first conductive wiring includes a wiring pattern, and the etching stopper is formed of the same material layer as the second conductive wiring. Moreover, the present invention further includes a transparent conductive film for forming a pixel electrode.
Furthermore, in the present invention, it is preferable that at least one of the above first and second conductive wirings is set in the insulating structure formed of the insulating film in which the portion exposed from the edge portion is adjoined.
Furthermore, the present invention provides a fabrication method of a thin-film-transistor-array substrate of the present invention which comprising the steps of:
providing an insulating substrate,
depositing a conductive material on the insulating substrate, and patterning the material to form a conductive wiring including an wiring pattern;
forming an thin-film-transistor structure including a first insulating film; depositing a second insulating film for covering at least the thin-film-transistor structure;
forming a polymer insulating film containing an organic polymer on the second insulating film and patterning the polymer insulating film to form an edge of said organic polymer insulating film; and
etching at least the first insulating film by using an etching stopper to form an insulating structure which covers the conductive wiring protruded from said edge of said polymer insulating film.
In the case of a fabrication method of the present invention, the above polymer insulating film may contain a photosensitive resin or a photosensitive polymer composition selected out of acrylic resin, polyimide resin, and polybenzocyclobutene. Moreover, the above etching stopper may be formed on the first insulating film. Furthermore, the etching stopper may be formed on the above second insulating film.
A fabrication method of the present invention further comprises a step of forming another conductive wiring and the etching stopper is formed of the same material layer as the another conductive wiring. In the present invention, a transparent conductive film for forming pixel electrodes is formed on the polymer insulating film before patterning the polymer insulating film.
Moreover, the present invention provides a display device including the thin-film-transistor-array substrate mentioned above. In the case of the present invention, the display device can be selected from a liquid-crystal display device and an electroluminescence display device.